1. Field of the Invention
The present invention relates to a comparator circuit used for a protection circuit, more particular to a window comparator circuit to is protect an object circuit to be protected from an excessively high or low input voltage.
2. Description of the Related Art
A type of window comparator circuit has been known as a circuit which is used for protecting an object circuit (hereinafter referred to a protected circuit) suffering from excessively high or low input voltage. For instance, Japanese Patent Laid-open Publication Number JP-1982-40657 discloses a circuit configuration comprising two comparator circuits and resistors which are connected in series to generate two reference voltages, each reference voltage is applied to either a non-inverting input terminal or an inverting input terminal of the two comparators. The output terminals of the comparators are configured as open collector circuits and are pulled up with resistors. In this configuration, the input voltage is inputted to a non-inverting input terminal and an inverting input terminal of the two comparators and the input voltage is compared with the two reference voltages so as to limit the input voltage being exceed an upper limit voltage and a lower limit voltage. In addition, patent documents, Japanese Patent Laid-open Publication Number JP-2004-301709 and JP-2008-170285 can be listed as related arts of the present invention.
In the document of the Japanese patent laid open number JP-1982-40657, operational amplifiers (hereinafter referred to op-amp) have been used in order to limit the input voltage being exceed the upper voltage limit and the under voltage limit. However, an op-amp circuit employs approximately 20 transistors so that the circuit scale will be increased. Since the technical features of the JP-2004-301709 and JP-2008-170285 include using a large number of op-amp circuits, similar problem arises as well as the document S57-40567.